delco code related books

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Re: delco code related books

Postby sprattzvx » Mon Nov 28, 2011 4:41 pm

0x00000 - 0x07FFF and 0x08000 - 0x0FFFF are the high and low of the same bank.
0x10000 - 0x17FFF and 0x18000 - 0x1FFFF are also the high and low of the same bank.
so this bit in port g, is there there one to control the switching for each hi-lo bank?
if 0x10000 - 0x17FFF is a low bank that is not seen, then the bit that controls the hi-lo switch for this bank will always be pointing at the high of this bank, allowing constant access to tranny cals.
so if the common low bank contains cal data and frequently used subs it would need access to this bank at all times, can the software request access to both the hi and lo at the same time? or is the current subroutine loaded to ram, allowing the software point the bit in port g to look at high bank A when required... :wtf:

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Re: delco code related books

Postby charlay86 » Mon Nov 28, 2011 6:00 pm

The lower half of the memory seen by the processor (0-0x7fff) cannot be switched, only the higher section 8000-ffff. there is no second low bank.
address line A15 and Port G bit 6 are ANDed in hardware to drive A16.

the main routine of the software resides in the Common lower bank which can always be seen, and is unaffected by the bank switching.
when a subroutine in one of the high banks is required to be executed, the port g pin is changed so that when the subroutine is called the MCU will see the correct memory.
here is an example of this:
Code: Select all
SUB_MINOR_0:
   tpa
   psha
   sei
   ldab   PORTG              ; Port G Data
   orab   #0x40 ;   '@'
   stab   PORTG              ; Port G Data
   pula
   tap
   brclr   *RAM_OPTIONS1,#1,loc_7D0A     ; BRANCH IF AUTO
   brset   *RAM_OPTIONS2,#0x80,loc_7D07 ; '€' ; BRANCH IF MAN. VSS
   jsr   loc_1DD51           ; MANUAL VSS
loc_7D07:                 ; CODE XREF: SUB_MINOR_0+11j
   jsr   loc_1DDE2
loc_7D0A:                 ; CODE XREF: SUB_MINOR_0+Dj
   jsr   loc_1A000
   tpa
   psha
   sei
   ldab   PORTG              ; Port G Data
   andb   #0xBF ;   '¿'
   stab   PORTG              ; Port G Data
   pula
   tap
   jsr   sub_BB4A
   rts
; End of function SUB_MINOR_0

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Re: delco code related books

Postby antus » Tue Nov 29, 2011 3:15 pm

Good explanation Charlay86 :thumbup: Im going to move this thread to the disassembly/reassembly section.
Have you read the FAQ? For lots of information and links to significant threads see here: viewtopic.php?f=7&t=1396

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Re: delco code related books

Postby sprattzvx » Tue Nov 29, 2011 7:54 pm

charlay86 wrote:The lower half of the memory seen by the processor (0-0x7fff) cannot be switched, only the higher section 8000-ffff. there is no second low bank.
address line A15 and Port G bit 6 are ANDed in hardware to drive A16.

the main routine of the software resides in the Common lower bank which can always be seen, and is unaffected by the bank switching.
when a subroutine in one of the high banks is required to be executed, the port g pin is changed so that when the subroutine is called the MCU will see the correct memory.
here is an example of this:
Code: Select all
SUB_MINOR_0:
   tpa
   psha
   sei
   ldab   PORTG              ; Port G Data
   orab   #0x40 ;   '@'
   stab   PORTG              ; Port G Data
   pula
   tap
   brclr   *RAM_OPTIONS1,#1,loc_7D0A     ; BRANCH IF AUTO
   brset   *RAM_OPTIONS2,#0x80,loc_7D07 ; '€' ; BRANCH IF MAN. VSS
   jsr   loc_1DD51           ; MANUAL VSS
loc_7D07:                 ; CODE XREF: SUB_MINOR_0+11j
   jsr   loc_1DDE2
loc_7D0A:                 ; CODE XREF: SUB_MINOR_0+Dj
   jsr   loc_1A000
   tpa
   psha
   sei
   ldab   PORTG              ; Port G Data
   andb   #0xBF ;   '¿'
   stab   PORTG              ; Port G Data
   pula
   tap
   jsr   sub_BB4A
   rts
; End of function SUB_MINOR_0

is this initial power on, when the ecu is determining the trans code to be used? it would indicate the flags for either man vss or aut trans are contained in the lower half of the memory at addresses 7d0a and 7do7.
looks to see man vss "set", so refers to address 1dde2 on the high, then switches port g to see this location on the high bank and sees sub_bb4a which is manual trans related. coud some one take five to navigate through the steps of what the ecu is looking at in that sequence?from the start of the sequence? think i may have it all wrong. but very interesting stuff.

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Re: delco code related books

Postby charlay86 » Wed Nov 30, 2011 12:14 pm

I suggest familiarising yourself with the 'hc11 instruction set :geek: it will make a lot more sense then.

The code on the PCM is structured to ensure that it has enough time (in theory!) to do the necessary calculations, refresh the ram, and service the interupts etc.

the code I pasted earlier is the first of 16 minor subroutines, one of which is called every 6.25ms, sequentially by the main code loop.
Each one of these subroutines then calls a number of other routines to perform each the various calculations required to run the engine and transmission.


ok so this portion of code is the bank switching.

Code: Select all
       tpa                            ;transfer the value of the cpu status flags register to accumulator a
       psha                          ;push accumulator a onto the stack
       sei                             ;set the interrupt mask bit (inhibits interrupts from being executed)
       ldab   PORTG              ;load accumulator b with the value from Port G's Data register
       orab   #0x40               ;logical OR accumulator b with 0x40, with the result in accumulator b (sets bit 6)
       stab   PORTG              ;store the contents of accumulator b to Port G's Data register
       pula                            ;pull the last value that was placed on the stack back off and store in accumulator a
       tap                             ;transfer the value from accumulator a to the cpu status flags register (this will also clear the interrupt mask bit, allowing interrupts to be serviced again)
       .......
       tpa                            ;transfer the value of the cpu status flags register to accumulator a
       psha                          ;push accumulator a onto the stack
       sei                             ;set the interrupt mask bit (inhibits interrupts from being executed)
       ldab   PORTG              ;load accumulator b with the value from Port G's Data register
       andb   #0xBF              ;logical AND accumulator b with 0xBF, with the result in accumulator b (clears bit 6)
       stab   PORTG              ;store the contents of accumulator b to Port G's Data register
       pula                            ;pull the last value that was placed on the stack back off and store in accumulator a
       tap                             ;transfer the value from accumulator a to the cpu status flags register (this will also clear the interrupt mask bit, allowing interrupts to be serviced again)
       ........



Code: Select all
<<<SWITCH TO HIGH BANK 2>>>
.............
      brclr   *RAM_OPTIONS1,#1,loc_7D0A              ; BRANCH to "loc_7D0A" IF MANUAL TRANSMISSION OPTION FLAG IS CLEAR (branch if auto essentially) 
      brset   *RAM_OPTIONS2,#0x80,loc_7D07        ; BRANCH to "loc_7D07" IF MANUAL TRANSMISSION VSS OPTION FLAG IS SET
      jsr   loc_1DD51                                               ;jump to subroutine at address 0xDD51 (I have renamed it to read 1DD51 since that is where it is physically located)
                                                                            ;If we got here we must be a manual transmission with an auto style VSS, a Getrag box?
loc_7D07:        jsr   loc_1DDE2                              ;jump to subroutine at address 0xDDE2 (I have renamed it to read 1DDE2 since that is where it is physically located)
loc_7D0A:        jsr   loc_1A000                              ;jump to subroutine at address 0xA000 (I have renamed it to read 1A000 since that is where it is physically located)
............
<<<SWITCH TO HIGH BANK 1>>>
............
        jsr   sub_BB4A                                               ;jump to subroutine at address 0xBB4A

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Re: delco code related books

Postby VL400 » Wed Nov 30, 2011 3:02 pm

Its prob also worthwhile starting on some simpler code to get the feel for the code layout. GM used an almost identical structure for all Delco ECU/PCMs through the years and was able to reuse software modules all over the place. A quick overview of how the single bank ECU executes code might fill in some pieces..

Main dispatch loop runs 160 times a second. Does misc stuff like IAC stepping, MAP read, VSS read and ALDL bit banging, then dispatches to the proper minor & major loop.
2 minor loops that alternate. Each runs 80 times a sec. One for fuel the other for spark.
16 major loops that run round robin. Each runs 10 times a second.
The main dispatch loop is entered via an interrupt driven at 160 Hz. It will then dispatch to the proper minor loop. Once the minor loop completes the proper major loop is run. Once the major loop completes the code drops into a wait loop until the next 160 Hz interrupt. The sequence above repeats running the other minor loop then the next major loop in turn.
Stuff like the diags, reading the CTS and IAT, controlling the shift light and TCC are done in the major loops. Time critical stuff like timing and fueling control are done in the minor loops.
The is also an init routine that runs at ignition on along with a factory diagnostic routine that nevers runs (unless you use the secret code).

Source: http://www.thirdgen.org/techboard/posts ... post9.html

The later PCMs use a very similar finite state machine except for MAF and all the trans stuff. The bank switching just means it switches the bank, then calls the routine/routines in that bank which complete its tasks before returning to the common area.


Lots of US based bins have been hacked out and posted up, can find some here .. http://www.moates.net/fileman/index.php ... nd%20Hacks
The access username is moatesuser and moatespassword (as found here .. http://www.moates.net/documentation.php ... tion_id=19)

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Re: delco code related books

Postby sprattzvx » Wed Nov 30, 2011 6:57 pm

wow good stuff there guys thanks for stepping that out. thats a good overview there vl400. bit of insight as to the speed that instruction loops are carried out.
think i might look into getting a grip of the basics of the hc11 chip architecture and some basic code. get the feeling you people have been toying with this stuff for some time, seems incredibly complex as 202 said. long way from the old commodore 64 days: 10 if a$ =<>5, then goto 30 ...haha those where advanced machines.
dh forum has turned out to be pretty killer. always something interesting catching my eye :study:

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Re: delco code related books

Postby Holden202T » Wed Nov 30, 2011 9:01 pm

VL400 is the only one i know that can read the delco matrix fluently! :P

so i call him Neo hahahaha

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Re: delco code related books

Postby antus » Wed Nov 30, 2011 10:02 pm

Your talking basic there, which was interpretted by the c64 firmware. If you look at the z80 code instead, then your in the right ballpark :) I used to code basic on my z80 powered amstrad cpc6128, but it wasn't untill years later that I figured out what those pokes followed by blocks of hex did to enable those funky | commands. And if you didn't have an amstad (like pretty much everyone) then you probably have no idea what I'm talking about!
Have you read the FAQ? For lots of information and links to significant threads see here: viewtopic.php?f=7&t=1396

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Re: delco code related books

Postby sprattzvx » Fri Dec 02, 2011 9:06 pm

hey all. looks like this is gonna be my chrissy present from the missus and ruggies :D
i had a look over a few sample pages, and it looks to cover most of the basics in a tutorial type format. bit pricy.
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