Ford EEC-V EEPROM type for EL

[VX L67 Getrag]

I thought I better put this in off topic as I didn't want to taint GM stuff with the blue oval Found On Rubbish Dumps!

I've been mucking around with an EL EEC-V PCM I have & managed to get the eeprom off that i'm guessing/hoping holds all the Calibration data which comes in 256k 4 banks of data.
Anyway I pulled it off & socketed it in hope to maybe adapt an ostrich for realtime tuning!
I don't know what the eeprom type is to even get a read off it!
If I put the eeprom in the socket it runs fine, if I take the eeprom out of the socket the car won't run & fuel pump stays on & fans telling error, then if I put a tuned file on J3 port without anything in socket it runs fine!

So I think I'm getting somewhere but been told the layout of these eeproms from intel have offset pins & will need an adapter to read at best & then obviously need an adapter for ostrich too!

With how small the eeprom is though I'm thinking it might store some data on that & some on another?

Any advice or ideas would be appreciated

[Apples]

you got me interested in what you find out regardless of brand.

[antus]

You can probably find some info and xdfs here: http://www.tiperformance.com.au/technical.html

[VX L67 Getrag]

Yeah Jason from TI is already pretty impressed with how far I've got so far!

But no he has no idea to go further than I have!

[charlay86]

Just read it as the largest size 24 pin Intel eeprom?

[VX L67 Getrag]

Good idea I'll try that today!

[VX L67 Getrag]

No such luck!

The 24pin Intels that don't need an adaptor read very small & not sure what the 1's even look like to know if there 24pin DIP as it just tells me need adapter!

Thanks for the idea though!

[festy]

That eprom uses a multiplexed bus for both address and data.
As a guess, I'd say reads are a 3 step process, something loosely resembling:
1) MCU sets the bus to the low byte of the address, pulses a clock line so the eprom reads the address into a register
2) MCU sets the bus to the high byte of the address, clocks that into the eprom and switches it's bus pins to inputs
3) eprom switches it's bus pins to outputs, writes the data byte for the requested address to the bus pins where the MCU reads them.
So that would give 256k with only 8 bus lines plus latch controls pins.

I found a pinout of the J3 port, it looks like all the lines you'd need for RT are there but you'd need to implement the latching stuff.

See page 19 of this pdf for the J3 pinout - it's for the EEC-IV but I would assume the pinout was roughly standardized?

[VX L67 Getrag]

Ah cool I do have that doco, but it's all a bit over my head!

Thanks heaps but I'm not that clever & guess I've reached the end of my limits as that's all double dutch to me!

Yeah they are standardized too as they use same adapter for all EEC tuning!
Just offsets change!

[festy]

ok maybe I can explain it a bit better.
On a typical 256k eprom, there's 16 address lines and 8 data lines.
These are called the A (address) and D (data) busses.
The processor sets the 16 address lines to represent what eprom address it wants to read.
ie. to read address 0 all pins are set low, to read address 1 they're all low except address line A0.
If you convert an address to binary, that's the pattern you'd see across the address pins.
Once the processor has set the pins to the correct state, it switches a control pin that tells the eprom that the address pins are ready to be read.
The eprom then reads those 16 pins, and uses the address pin's state to work out what address the processor wants. Then it fetches that byte, and sets the 8 data bus pins to match the 8 bits it has stored in that address location.
The processor reads the state of the data pins, and now knows what byte was stored at the particular address.

So how the EEC-V is different, is that it only has one 8 bit bus that is shared between the addresses and the data.
So the processor sends the first 8 bits of the 16 bit address to the eprom and says "remember this byte", then sends the other half of the address and says "this is the other half of the address I want, go fetch!"
The eprom then takes the two bytes it's been sent and looks up the data at that address, then sends the 8 bits of the data byte back down the same bus that the address came on.

The advantage to doing it this way is you need a lot less wires - the down side is that it takes longer because it's done in multiple steps.

Is that any clearer, or have I just confused you more?