PCM Hammer P12 development

They go by many names, P01, P59, VPW, '0411 etc. Also covering E38 and newer here.
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Re: Delphi P12 PCM (Second Gen PCM for GM 4.2L Inline 6)

Post by antus »

no, not the reason, but a symptom. thats just that particular interface saying nothing in the receive buffer - eg the pcm didnt respond on a poll.
Have you read the FAQ? For lots of information and links to significant threads see here: http://pcmhacking.net/forums/viewtopic.php?f=7&t=1396
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Re: Delphi P12 PCM (Second Gen PCM for GM 4.2L Inline 6)

Post by Gampy »

The application (VPW Explorer) is expecting a response from the Mode36.80 kernel upload, it is not getting it, the application is complaining that the buffer on the tool is empty, it should not be if all is well!

That is basically saying the kernel didn't load or was unable to communicate, ATM I suspect both, I believe we have not got the load address correct (where in the PCM's RAM we place the kernel).
Remember the log with all the A2 messages, they would have stopped if the Os jumped to the kernel, they never missed a beat, therefore it is of my opinion that the Os did not like the jump address (the kernel address in RAM).

There are three basic things we need to know, that we don't know for sure,
1. Available RAM address to load the kernel into.
2. The COP addresses (WatchDog), so the kernel can keep scratching the dog, keeping it happy and alive.
3. The DLC addresses so the kernel can communicate with the outside world.

edit: In that order by the way.

Close is NOT good enough!
Finding them is a bit of a black art.

It doesn't happen with the snap of the fingers ...

Pretty sure I've got the COPs worked out, the RAM address, I'm not so comfortable with, the DLC, ATM I have not a clue!

We are also working with a dual CPU unit, that makes it even harder ... What's used for what CPU, each one is going to have a RAM address and it's own COPs, not sure about DLC, it may speak to the outside world through just one CPU.

There are a lot of unknowns yet, but we are slowly eating this elephant one bite at a time ...
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Re: Delphi P12 PCM (Second Gen PCM for GM 4.2L Inline 6)

Post by darkman5001 »

In the documentation for the flash chip, AMD talks alot about memory addressing and layout. Can any of that information tell us anything helpful?
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Re: Delphi P12 PCM (Second Gen PCM for GM 4.2L Inline 6)

Post by kur4o »

In that kind of situation, usually you overwrite something in ram that locks the pcm not responding back to upload.

Usually it will respond that the upload was successful and than it will jump to subroutine and execute the upload.

I highly recommend you upload to fff2000 or ffff6000 for testing.
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Re: PCM Hammer fails on P12

Post by Gampy »

O-boy, ever had one of them days ... Well I just did!
Didn't realize it until I took a fresh look at my test kernel build system ...

I redesigned the kernel build system for PCM Hammer some time ago to allow for custom addressing.
When I jumped into this P12 excursion I copied my test package to a P12 folder and updated the build system to the newer build system.

This dummy forgot to update the linker (.ld) files ... Duh!
So the testing has been an absolute waste of time!

What can I say!

Needless to say I'll be building some test kernels here in a bit that hopefully will bear fruit ...

My apologies to everyone!
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Re: PCM Hammer fails on P12

Post by kur4o »

I found one other pcm that uses the same COp and looks much more readable.

The dlc should be ffff60c and fffff60e just like regular ls1 stuff.

Now the Cop will be piece of hardwork, First part is easy fffffa55

Second part will need much more work. Seems some waiting is involved and not very clear yet. Some ideas can be taken from a commercial piece of art.

Or copied as is from existing code.
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Re: PCM Hammer fails on P12

Post by Gampy »

Just sent 5 tests ... Hopefully I haven't jacked anything else up and it finally speaks!
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Re: PCM Hammer fails on P12

Post by kur4o »

I think I found the cleanest example of cop

From FF29c8 to ff2a2d
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Re: Delphi P12 PCM (Second Gen PCM for GM 4.2L Inline 6)

Post by Gampy »

darkman5001 wrote:In the documentation for the flash chip, AMD talks alot about memory addressing and layout. Can any of that information tell us anything helpful?
Not right yet, we have not got that far yet, possibly when we get that far, however it is a chip family we are familiar with.

BTW, I did edit my post above, about what is needed, I added "In that order by the way.".
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Re: PCM Hammer fails on P12

Post by darkman5001 »

Guys, I just want to say thank you for taking on this endeavor with me. I have learned alot already and it is way cool. I am absolutely not a programmer even though I have always been interested in trying to learn. I am an electronics guy with scientific tools for that, and also a mechanic regularly. I love technology and doing crazy shit. Hell, I have 6 Dell datacenter servers all with dual Zeon processors running in my basement just mining for Bitcoin, lol. I always loved tinkering and doing things most can't. I love collecting software, and I have alot, including over a terabyte of actual dealer software. Another thing I have learned about you guys is you are a good team of programmers coming together sharing ideas to do something cool. So here is a question that I want to ask you all... Have you ever thought of just reverse engineering GMs TIS2000 software? The software is completely stand alone offline, and will program these PCMs without ever connecting the internet, and I know how to use it. The Tech2 has a PCMCIA memory card that is only 32MB and the TIS2000 software isn't all that large, not to mention it was written over 20 years ago. Have any of you guys thought of reverse engineering it? All of the answers to be found are there. I can provide whatever you need. I don't just have GM software, but just about any car manufacture software you could want, and the cracks for most of them. Just throwing it out there. Leave no stones unturned.
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