PCMHammer P04

[ironduke]

Instead of having one kernel to read AND write can there be separate kernels? One pushed to the ecu to read, then another to write? Would this save significant space?

[Gampy]

Unfortunately that doesn't make the Write Kernel small enough ... There is only about 250 bytes difference between a Write Kernel and a Read/Write Kernel.

If we need to break it up, we will need to break it into at least 2 parts, AMD and Intel, but most likely into 3 parts, Read, AMD Write, Intel Write.

However, with the latest change, the AMD P04 now seems to work using a full Kernel, still having write issues with the Intel P04, even with just an Intel Kernel.

-Enjoy

[antus]

Are you moving the stack in the loader or the kernel? There might still be a piece of ram we need to avoid because something is writing in to the flash kernel. If it worked before, it sounds like this is the cause. So we might need to map out what works and what breaks and do some load address tuning still. This may be what you are doing already. Its the approach I started on the P08 last night before my brain turned to mush after a long day job and I realised that trying to modify this code in that state was probably going to end up in a brick on my only P08 so I aborted (at least it has BDM provided the flash isn't damaged, but still, might re-visit in lunch break today).

Comparing one of the commercial kernels its 2.65kb and loading and running on the P04, so a 650 byte loader and a 1900 byte kernel should be possible.

[Tazzi]

Mmmm, that memory size limit doesn't sound right.
Id have to dig out my old P04 stuff, but I feel like the issue was the data needed to be uploaded in 1 chunk, not multiple.

[antus]

We are way past that tazzi, the loader is small enough to upload with any of the supported interfaces and supports 36/80 so that we can upload the kernel in chunks. It has been working fine for quite a time now for reads. https://github.com/LegacyNsfw/PcmHacks/ ... s/Loader.S

[Tazzi]

We are way past that tazzi, the loader is small enough to upload with any of the supported interfaces and supports 36/80 so that we can upload the kernel in chunks. It has been working fine for quite a time now for reads. https://github.com/LegacyNsfw/PcmHacks/ ... s/Loader.S

Oh my bad! Didn't realize that one!

[Gampy]

Yes, the same code has worked, I am trying various addresses, to no avail ... Moving stack in Loader.

The Write is failing, BDM shows a clean erase, it's odd, I've used this same code before, have done many writes, have posted an image of it's completion ... Same code!

-Enjoy

[Tazzi]

Yes, the same code has worked, I am trying various addresses, to no avail ... Moving stack in Loader.

The Write is failing, BDM shows a clean erase, it's odd, I've used this same code before, have done many writes, have posted an image of it's completion ... Same code!

-Enjoy

Give more time after the erase to when writing.
If its intel based, if you are switching the 12v on and off between erase and then writing, this will also cause problems.

I found adding a nop loop after enabling/disabling 12v for intel flashes was critical to be able to erase and write without issues.

Some intel flashes are a bit slower then others, could be due to age or whatever, so try increasing time from enabling this bit to see if it helps.

Please note I Have not looked over the code base to verify whats being done here.

[antus]

There is a loop here, it could be tweaked, but its working several other platforms as is. https://github.com/LegacyNsfw/PcmHacks/ ... nel.S#L677

[darkman5001]

I have not actually ripped one apart, but I don't think they are potted, I think the cover is just glued.

I think Darkman5000 posted a pic in the P12 thread.

Edit: I think (my brain is getting pretty foggy) the P12 and the E40 share BDM ... I have E40 BDM Pinout.

-Enjoy

The E40 and the P12 have a different board layout so the exact BDM diagram won't work. Tried that along time ago. They look so similar however if you try tracing it, it is totally different.