PCM Hammer P10 development

They go by many names, P01, P10, P12, P59, E38, VPW, '0411 etc.
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antus
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Re: PCM Hammer P10 development

Post by antus »

Wow that was pretty quick! Good work and congrats!
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Re: PCM Hammer P10 development

Post by kur4o »

Nice work. It may be good idea to add the slave init and cop, just to make sure it is as stable as possible. Slave migth use some shared ram for sure.
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Re: PCM Hammer P10 development

Post by darkman5001 »

I am here to help however I can. I have a few P10s ready for testing.
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Re: PCM Hammer P10 development

Post by antus »

@gampy ive merged your P10 app changes as well as P12 work in to the antus/p12 branch of pcmhammer. from my testing its working for P01/P59 and P12, and I suspect it'll be working for P10 as well, but using the 1mb file size as its the same chip as the P59. Can you do your wonders to the kernel build system so that it will build all 3 kernels and commit to that branch?

As well as that we need to figure out checksum validation for P10 and P12, then I think we can look to merge in to pcmhammer for the next release.
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Re: PCM Hammer P10 development

Post by Gampy »

What a nice sterile thread ... What a shame others don't get to read, follow and learn!
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Re: PCM Hammer P10 development

Post by antus »

Im not sure what you mean. Theres commit notes in the repo? But you said P10 was only a different load address so nothing to follow?
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Re: PCM Hammer P10 development

Post by Gampy »

So it's known ...

The kernel buffer size is,

Code: Select all

#define MessageBufferSize (4096+20)
Then there is this, that IMO should not be in production code,

Code: Select all

#define BreadcrumbBufferSize 100
It all adds up to more then there is space ...

According to,
kur4o wrote:Upload range is ffa000-ffe000
Loading at 0xFFB800 + 0x1EC2 (KernelSize) + 0x1000 (Buffer) + 0x14 (header + extra) + 0x64 (Breadcrumb) = 0xFFE73A
So a bit of overflow ... Fortunately not all the buffer space is actually used.
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Re: PCM Hammer P10 development

Post by Tazzi »

On each ecu, probably need to figure out the lower boundary upload location to send the kernel into for maximizing available space.

On a P12, theres tonnes of room, I believe GMs kernels is uploaded at F20000 off the top of my head? Not sure about P10 though.
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Re: PCM Hammer P10 development

Post by Gampy »

Tazzi,

If you look back a few of my posts you'll see where I stated it's a delicate fit because of the kernel size, there is just not enough contiguous memory available.
The kernel needs to go on a serious diet ... Obviously that means stripping out the unnecessary and elegance.
Or move to assembly.
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Re: PCM Hammer P10 development

Post by NSFW »

What are the max kernel sizes for the P10 and P12?

The reason I ask is that the current code checks the size limit before uploading to a P01 / P59, and it would be nice to do the same for the P10 and P12 too.

Not a requirement, but if it's easy I'll add it.
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